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<div><a class="htmltoc" href="../FRONTMATTER/manconts.xml">NAG Library Manual</a></div><hr/><h1 class="libdoc">NAG Library<br/><br/>Introduction to the NAG Library for SMP &amp; Multicore</h1><div class="htmltoc">
<h2 class="htmltoc"><span class="htmltochead" onclick="showLevel('htmltoc');"><span class="htmltocplus" id="htmltocplus">+</span><span class="htmltocminus" id="htmltocminus">&#8722;</span></span>&#160;Contents</h2>
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<div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#INTRO1">1&#160;&#160;<b>What is the NAG Library for SMP &amp; Multicore?</b></a>
</div><div class="htmltoc">
<span class="htmltoc" onclick="showLevel('tocINTRO3');"><span class="htmltocplus" id="tocINTRO3plus">+</span><span class="htmltocminus" id="tocINTRO3minus">&#8722;</span></span>
<a class="htmltoc" href="#INTRO3">2&#160;&#160;<b>How to Use the NAG Library for SMP &amp; Multicore</b></a>
<div class="htmltocitem" id="tocINTRO3">
<div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#INTRO31">2.1&#160;&#160;<b>Linking and Executing Your Code</b></a>
</div><div class="htmltoc">
<span class="htmltoc" onclick="showLevel('tocINTRO32');"><span class="htmltocplus" id="tocINTRO32plus">+</span><span class="htmltocminus" id="tocINTRO32minus">&#8722;</span></span>
<a class="htmltoc" href="#INTRO32">2.2&#160;&#160;<b>How to Maximize the Performance of Your Application</b></a>
<div class="htmltocitem" id="tocINTRO32">
<div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#C06">2.2.1&#160;&#160;<b>FFTs (Chapter C06)</b></a>
</div><div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#D01">2.2.2&#160;&#160;<b>Quadrature (Chapter D01)</b></a>
</div><div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#D03">2.2.3&#160;&#160;<b>PDEs (Chapter D03)</b></a>
</div><div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#F11">2.2.4&#160;&#160;<b>Sparse Iterative Solvers (Chapter F11)</b></a>
</div><div class="htmltoc">
<span class="htmltocplus">&#160;&#160;&#160;</span>
<a class="htmltoc" href="#G05">2.2.5&#160;&#160;<b>Quasi-random number generators (Chapter G05)</b></a>
</div>
</div>
</div>
</div>
</div>
</div>
</div><h2 class="standard"><a class="sec" name="INTRO1" id="INTRO1"/>1&#160;&#160;What is the NAG Library for SMP &amp; Multicore?</h2>
<div class="paramtext">The NAG Library for SMP &amp; Multicore is a library of numerical routines intended for use on Symmetric Multiprocessor (SMP) machines, which are characterised by having both:
<table class="standard-100"><tr>
<td style="width:1.5em;" valign="baseline">&#8211;</td>
<td valign="top">a number of homogeneous processors (which may also be refered to as cores);</td>
</tr><tr>
<td style="width:1.5em;" valign="baseline">&#8211;</td>
<td valign="top">a cache-coherent (real or virtual) shared memory accessible by all the processors (or cores).</td>
</tr></table>
</div><div class="paramtext">Most current processors are multicore, i.e., they include more than one core on each chip. The vast majority of these have the necessary characteristics to be programmed with SMP techniques, and thus would be suitable for use with the NAG Library for SMP &amp; Multicore. A small number of more specialised multicore processors cannot be used in this manner, and thus are <b>not</b> suitable for use with the NAG Library for SMP &amp; Multicore. If in doubt, please contact <a class="url" href="http://www.nag.co.uk">NAG</a> for advice on suitability.</div><div class="paramtext">The NAG Library for SMP &amp; Multicore contains the full functionality currently available in the NAG Fortran Library, and users are encouraged to familiarise themselves with the <a class="genint" href="../GENINT/essint.xml#ESSINT">Essential Introduction</a> for a general overview of the structure of these products. Routine interfaces are mostly identical to those of the NAG Fortran Library (the only differences are two routines where you have the option of providing extra information to the routine in the NAG Library for SMP &amp; Multicore version compared to the NAG Fortran Library version, as documented in <a class="sec" href="#D03">Section 2.2.3</a>). This makes the migration from using the NAG Fortran Library to using the NAG Library for SMP &amp; Multicore trivial.</div><div class="paramtext">Many routines have been specially tuned for this Library to make use of the processing power and shared memory parallelism of SMP systems. Many other routines in the NAG Library for SMP &amp; Multicore benefit from this increased performance by calling one or more of the tuned routines.</div><div class="paramtext">The list of routines that may benefit from SMP parallelism is listed in the &#8216;<a class="genint" href="../GENINT/smptuned.xml#SMPTUNED">Tuned and Enhanced Routines in the  NAG Library for SMP &amp; Multicore</a>&#8217; document, and includes many key routines in the areas of:
<ul class="listind"><li class="listind">Dense and Sparse Linear Algebra</li><li class="listind">FFTs</li><li class="listind">Random Number Generators</li><li class="listind">Quadrature</li><li class="listind">Partial Differential Equations</li><li class="listind">Interpolation</li><li class="listind">Curve and Surface Fitting</li><li class="listind">Correlation and Regression Analysis</li><li class="listind">Multivariate Methods</li><li class="listind">Time Series Analysis</li><li class="listind">Financial Option Pricing</li></ul>
</div><div class="paramtext">At each new Mark of the Library, we seek to expand the scope of parallelism to as many additional routines as possible, as well as incorporating new functionality introduced in the equivalent Mark of the NAG Fortran Library. Details of changes to the Library in the current Mark are available in the &#8216;<a class="genint" href="../GENINT/smpnews.xml#SMPNEWS">Mark 22 NAG Library for SMP &amp; Multicore News</a>&#8217; document.</div><div class="paramtext">This product was formerly known as the NAG SMP Library.</div><h2 class="standard"><a class="sec" name="INTRO3" id="INTRO3"/>2&#160;&#160;How to Use the NAG Library for SMP &amp; Multicore</h2><h3 class="standard"><a class="sec" name="INTRO31" id="INTRO31"/>2.1&#160;&#160;Linking and Executing Your Code</h3>
<div class="paramtext">If your code currently contains calls to NAG Fortran Library routines then it is a simple matter of relinking your code to the NAG Library for SMP &amp; Multicore (in place of the NAG Fortran Library) to benefit from the optimized performance of the tuned NAG Library for SMP &amp; Multicore routines.  On most platforms, parallelism is requested by setting an environment variable equal to the number of processors you wish the routines to run on and then running your linked code.</div><div class="paramtext">The steps required when compiling, linking and running programs on SMP machines, in order to fully exploit your parallelism are very much implementation specific.  The particular details for your implementation are given in the <a class="url" href="http://www.nag.co.uk/doc/inun/fl22.html">Users' Note</a> which should be read carefully before using the NAG Library for SMP &amp; Multicore.</div><div class="paramtext">More general information regarding the conventions used in this Library is provided in the <a class="genint" href="../GENINT/essint.xml#ESSINT">Essential Introduction</a>.</div><h3 class="standard"><a class="sec" name="INTRO32" id="INTRO32"/>2.2&#160;&#160;How to Maximize the Performance of Your Application</h3>
<div class="paramtext">There are a number of things you should consider when trying to maximize the performance of your code when linking to this Library.  In the first instance you should be aware of the functionality of the Library and of which routines you should expect to achieve good levels of performance and scalability; for this you should consult the <a class="genint" href="../GENINT/smptuned.xml#SMPTUNED">Tuned and Enhanced Routines in the  NAG Library for SMP &amp; Multicore</a> document.  There may be sections of your code which reproduce the functionality of a tuned/enhanced NAG routine or vendor BLAS routine; in such cases you should replace your sections of code with calls to the appropriate routines.</div><div class="paramtext">Note that the performance increase achieved, if any, when calling one of the tuned or enhanced routines will vary depending upon which routine is called, problem sizes and other parameters, system design and operating system configuration. If you frequently call a routine with similar data sizes and other parameters, it may be worthwhile to experiment with different numbers of threads, to determine the choice that gives optimal performance. Please contact <a class="url" href="http://www.nag.co.uk">NAG</a> for further advice if required.</div><div class="paramtext">In addition there are areas of the NAG Library for SMP &amp; Multicore that require further guidance , please see the following sections.</div><h4 class="standard"><a class="sec" name="C06" id="C06"/>2.2.1&#160;&#160;FFTs (<a class="chap" href="../C06/c06conts.xml">Chapter C06</a>)</h4>
<div class="paramtext">In many implementations the vendors supply their own FFT routines that are optimized for their particular platforms.  Where possible the NAG FFT routines call these vendor routines for optimal performance.  For details see the <a class="url" href="http://www.nag.co.uk/doc/inun/fl22.html">Users' Note</a> for your implementation.</div><h4 class="standard"><a class="sec" name="D01" id="D01"/>2.2.2&#160;&#160;Quadrature (<a class="chap" href="../D01/d01conts.xml">Chapter D01</a>)</h4>
<div class="paramtext">The performance of the quadrature routines in <a class="chap" href="../D01/d01conts.xml">Chapter D01</a> depends upon the nature of the user supplied function that calculates the value of the integrand at a given point and other problem parameters such as the the relative accuracy required. Parallelism may not be beneficial for all problems, in particular the parallelism in <a class="rout" href="../D01/d01gaf.xml">D01GAF</a> is only suitable for problems with a large number of data points.</div><h4 class="standard"><a class="sec" name="D03" id="D03"/>2.2.3&#160;&#160;PDEs (<a class="chap" href="../D03/d03conts.xml">Chapter D03</a>)</h4>
<div class="paramtext"><a class="rout" href="../D03/d03raf.xml">D03RAF</a> and <a class="rout" href="../D03/d03rbf.xml">D03RBF</a> require a user-supplied routine <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> to evaluate the functions <m:math><m:msub><m:mi>F</m:mi><m:mi>j</m:mi></m:msub></m:math>, for <m:math><m:mi>j</m:mi><m:mo>=</m:mo><m:mn>1</m:mn><m:mo>,</m:mo><m:mn>2</m:mn><m:mo>,</m:mo><m:mo>&#8230;</m:mo><m:mo>,</m:mo><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#NPDE"><m:mi mathcolor="#EE0000" mathvariant="bold">NPDE</m:mi></m:maction></m:math>. The parallelism within <a class="rout" href="../D03/d03raf.xml">D03RAF</a> and <a class="rout" href="../D03/d03rbf.xml">D03RBF</a> will be more efficient if <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> can also be parallelized. This is often the case, but you must add some OpenMP directives to your version of <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> to implement the parallelism. For example, the body of code from the first test case in the document for <a class="rout" href="../D03/d03raf.xml">D03RAF</a> is 
<pre class="verbatim">
      DO 20 I = 1, NPTS
         RES(I,1) = UT(I,1) - DIFF*(UXX(I,1)+UYY(I,1)) -
     +              D*(1.0D0+ALPHA-U(I,1))*EXP(-DELTA/U(I,1))
   20 CONTINUE
</pre>
</div><div class="paramtext">This example can be parallelized, as the updating of <a class="arg" href="../D03/d03raf.xml#PDEDEF_RES">RES</a> in each iteration of the loop <span class="mono">I</span> over <m:math><m:mn>1</m:mn><m:mo>,</m:mo><m:mo>&#8230;</m:mo><m:mo>,</m:mo><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#PDEDEF_NPTS"><m:mi mathcolor="#EE0000" mathvariant="bold">NPTS</m:mi></m:maction></m:math>&#160;is independent of every other iteration. Thus this should be parallelized in OpenMP as follows
<pre class="verbatim">
C$OMP DO
      DO 20 I = 1, NPTS
         RES(I,1) = UT(I,1) - DIFF*(UXX(I,1)+UYY(I,1)) -
     +              D*(1.0D0+ALPHA-U(I,1))*EXP(-DELTA/U(I,1))
   20 CONTINUE
C$OMP END DO
</pre>
</div><div class="paramtext">Note that the OpenMP PARALLEL directive must <b>not</b> be specified, as the OpenMP DO directive will bind to the PARALLEL region within the <a class="rout" href="../D03/d03raf.xml">D03RAF</a> or <a class="rout" href="../D03/d03rbf.xml">D03RBF</a> code. Also note that this assumes the default OpenMP behaviour that all variables are SHARED, except for loop indices that are PRIVATE.</div><div class="paramtext">To avoid problems for existing library users, who will not have specified any OpenMP directives in their <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> routine, the default assumption of <a class="rout" href="../D03/d03raf.xml">D03RAF</a> and <a class="rout" href="../D03/d03rbf.xml">D03RBF</a> is that <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> has not been parallelized, and they execute calls to <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> in serial mode. You must indicate this fact by using the argument <a class="arg" href="../D03/d03raf.xml#IND">IND</a> to <a class="rout" href="../D03/d03raf.xml">D03RAF</a> and <a class="rout" href="../D03/d03rbf.xml">D03RBF</a> by adding 10 to the normal value. Thus, in the NAG Library for SMP &amp; Multicore only, the following values may be specified for <a class="arg" href="../D03/d03raf.xml#IND">IND</a>:

<dl>
<dt class="paramval"><m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>0</m:mn></m:math></dt>
<dd>Starts the integration in time. <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> is assumed to be serial.</dd>
<dt class="paramval"><m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>1</m:mn></m:math></dt>
<dd>Continues the integration after an earlier exit from the routine. In this case, only the following parameters may be reset between calls to <a class="rout" href="../D03/d03raf.xml">D03RAF</a> or <a class="rout" href="../D03/d03rbf.xml">D03RBF</a>: <a class="arg" href="../D03/d03raf.xml#TOUT">TOUT</a>, <a class="arg" href="../D03/d03raf.xml#DT">DT</a>, <a class="arg" href="../D03/d03raf.xml#TOLS">TOLS</a>, <a class="arg" href="../D03/d03raf.xml#TOLT">TOLT</a>, <a class="arg" href="../D03/d03raf.xml#OPTI">OPTI</a>, <a class="arg" href="../D03/d03raf.xml#OPTR">OPTR</a>, <a class="arg" href="../D03/d03raf.xml#ITRACE">ITRACE</a> and <a class="arg" href="../D03/d03raf.xml#IFAIL">IFAIL</a>.  <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> is assumed to be serial.</dd>
<dt class="paramval"><m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>10</m:mn></m:math></dt>
<dd>Starts the integration in time. <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> is assumed to have been parallelized by you, as described above. In all other respects, this is equivalent to <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>0</m:mn></m:math>.</dd>
<dt class="paramval"><m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>11</m:mn></m:math></dt>
<dd>Continues the integration after an earlier exit from the routine. In this case, only the following parameters may be reset between calls to <a class="rout" href="../D03/d03raf.xml">D03RAF</a> or <a class="rout" href="../D03/d03rbf.xml">D03RBF</a>: <a class="arg" href="../D03/d03raf.xml#TOUT">TOUT</a>, <a class="arg" href="../D03/d03raf.xml#DT">DT</a>, <a class="arg" href="../D03/d03raf.xml#TOLS">TOLS</a>, <a class="arg" href="../D03/d03raf.xml#TOLT">TOLT</a>, <a class="arg" href="../D03/d03raf.xml#OPTI">OPTI</a>, <a class="arg" href="../D03/d03raf.xml#OPTR">OPTR</a>, <a class="arg" href="../D03/d03raf.xml#ITRACE">ITRACE</a> and <a class="arg" href="../D03/d03raf.xml#IFAIL">IFAIL</a>. <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> is assumed to have been parallelized by you, as described above. In all other respects, this is equivalent to <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>1</m:mn></m:math>.
<div class="paramtext">Constraint: <m:math><m:mn>0</m:mn><m:mo>&#8804;</m:mo><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>&#8804;</m:mo><m:mn>1</m:mn></m:math>&#160;or <m:math><m:mn>10</m:mn><m:mo>&#8804;</m:mo><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>&#8804;</m:mo><m:mn>11</m:mn></m:math>.</div>
<div class="paramtext">On exit: <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>1</m:mn></m:math>, if <a class="arg" href="../D03/d03raf.xml#IND">IND</a> on input was <m:math><m:mn>0</m:mn></m:math>&#160;or <m:math><m:mn>1</m:mn></m:math>, or <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../D03/d03raf.xml#IND"><m:mi mathcolor="#EE0000" mathvariant="bold">IND</m:mi></m:maction><m:mo>=</m:mo><m:mn>11</m:mn></m:math>, if <a class="arg" href="../D03/d03raf.xml#IND">IND</a> on input was <m:math><m:mn>10</m:mn></m:math>&#160;or <m:math><m:mn>11</m:mn></m:math>.</div></dd></dl>
</div><div class="paramtext">If the code within <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> cannot be parallelized, you must <b>not</b> add any OpenMP directives to your code, and must <b>not</b> set <a class="arg" href="../D03/d03raf.xml#IND">IND</a> to <m:math><m:mn>10</m:mn></m:math>&#160;or <m:math><m:mn>11</m:mn></m:math>. If <a class="arg" href="../D03/d03raf.xml#IND">IND</a> is set to <m:math><m:mn>10</m:mn></m:math>&#160;or <m:math><m:mn>11</m:mn></m:math>&#160;and <a class="arg" href="../D03/d03raf.xml#PDEDEF">PDEDEF</a> has not been parallelized, results on multiple threads will be unpredictable and may give rise to incorrect results and/or program crashes or deadlocks. Please contact <a class="url" href="http://www.nag.co.uk">NAG</a> for advice if required. Overloading <a class="arg" href="../D03/d03raf.xml#IND">IND</a> in this manner is not entirely satisfactory, consequently it is likely that replacement interfaces for <a class="rout" href="../D03/d03raf.xml">D03RAF</a> and <a class="rout" href="../D03/d03rbf.xml">D03RBF</a> will be included in a future NAG Library release.</div><div class="paramtext">Modified example programs for <a class="rout" href="../D03/d03raf.xml">D03RAF</a> and <a class="rout" href="../D03/d03rbf.xml">D03RBF</a>, which include parallel versions of the PDEDEF routines, are included in the distribution material for each implementation of the NAG Library for SMP &amp; Multicore.
</div><h4 class="standard"><a class="sec" name="F11" id="F11"/>2.2.4&#160;&#160;Sparse Iterative Solvers (<a class="chap" href="../F11/f11conts.xml">Chapter F11</a>)</h4>
<div class="paramtext">When running the  sparse iterative solvers with preconditioning on multiple processors, it may be beneficial to reduce the action of the preconditioner, e.g., by decreasing <a class="arg" href="../F11/f11daf.xml#LFILL">LFILL</a>, or by increasing <a class="arg" href="../F11/f11daf.xml#DTOL">DTOL</a> with <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../F11/f11daf.xml#LFILL"><m:mi mathcolor="#EE0000" mathvariant="bold">LFILL</m:mi></m:maction><m:mo>&lt;</m:mo><m:mn>0</m:mn></m:math>&#160;in <a class="rout" href="../F11/f11daf.xml">F11DAF</a> or <a class="rout" href="../F11/f11jaf.xml">F11JAF</a>. This will tend to increase the number of iterations required to obtain a converged solution, but will also allow a greater percentage of the computational work to be spent in the parallelized iterative solvers, resulting in a lower overall time to solution. There is unfortunately no choice of the various preconditioner parameters which is optimal for all types of matrix, and all numbers of processors, and some experimentation will generally be required for each new type of matrix encountered.</div><h4 class="standard"><a class="sec" name="G05" id="G05"/>2.2.5&#160;&#160;Quasi-random number generators (<a class="chap" href="../G05/g05conts.xml">Chapter G05</a>)</h4>
<div class="paramtext">The Sobol, Sobol (A659) and Niederreiter quasi-random number generators in <a class="rout" href="../G05/g05ymf.xml">G05YMF</a> have been parallelized, but require quite large problem sizes, as measured by both <a class="arg" href="../G05/g05ylf.xml#IDIM">IDIM</a> (which is defined in the preceding call to either <a class="rout" href="../G05/g05ylf.xml">G05YLF</a> or <a class="rout" href="../G05/g05ynf.xml">G05YNF</a>) and <a class="arg" href="../G05/g05ymf.xml#N">N</a>, to see any significant performance gain. In general <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../G05/g05ymf.xml#RCORD"><m:mi mathcolor="#EE0000" mathvariant="bold">RCORD</m:mi></m:maction><m:mo>=</m:mo><m:mn>1</m:mn></m:math>&#160;is faster than <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../G05/g05ymf.xml#RCORD"><m:mi mathcolor="#EE0000" mathvariant="bold">RCORD</m:mi></m:maction><m:mo>&#8800;</m:mo><m:mn>1</m:mn></m:math>&#160;on one processor, however <m:math><m:maction actiontype="link" dsi:type="simple" dsi:href="../G05/g05ymf.xml#RCORD"><m:mi mathcolor="#EE0000" mathvariant="bold">RCORD</m:mi></m:maction><m:mo>&#8800;</m:mo><m:mn>1</m:mn></m:math>&#160;parallelizes better. Thus the choice of <a class="arg" href="../G05/g05ymf.xml#RCORD">RCORD</a> value for optimal performance may differ for different number of processors.</div><hr/><div><a class="genint" href="../../pdf/GENINT/smpint.pdf">Introduction to the NAG Library for SMP &amp; Multicore (PDF version)</a></div>
<div><a class="htmltoc" href="../FRONTMATTER/manconts.xml">NAG Library Manual</a></div>
<div><hr/><a class="genint" href="../FRONTMATTER/copyright.xml">&#169; The Numerical Algorithms Group Ltd, Oxford, UK. 2009</a></div></body></html>
